refer to Operating Rules #10 in this datasheet. Ordering Code: Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering. Part Number: 74LS, Maunfacturer: National Semiconductor, Part Family: 74, File type: PDF, Document: Datasheet – semiconductor. 74LS datasheet, 74LS pdf, 74LS data sheet, datasheet, data sheet, pdf, Fairchild Semiconductor, Dual Non-Retriggerable One-Shot with Clear and.

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To obtain the best and trouble free operation from this device please read operating rules as well as the Fair- child Semiconductor one-shot application notes carefully satasheet observe recommendations. V I Input Clamp Voltage.

To obtain the best and trouble free operation from. Input pulse width may be of any duration relative to the output pulse width. I OS Short Circuit.

Pulse width is defined by the relationship: The range of jitter-free pulse widths is extended if VCC 74ls2221 5. The clear CLR input can terminate the output pulse at a predetermined time independent of the timing components. Month Sales Transactions. Recent History What is this? SeekIC only pays the seller after confirming you have received your order.

In most applications, pulse stability will only be limited by the accuracy of external timing components. DescriptionThe absolute maximum ratings of the 74LS00N are: This CLR input also serves as a trigger input when it is pulsed with a low level pulse transition.


Monostable Multivibrator

Output pulse width may be varied from 35 nanoseconds to a maximum of 70 s by choosing appropriate timing components. This mode of triggering requires first the B input be set from a. Each device has three inputs permit. Pin A is an active-LOW trigger 74sl221 input and. You may also be interested in: I CC Supply Current. Margin,quality,low-cost products with low minimum orders.

Each multivibrator of the 74LS features a negative-transition-triggered input datqsheet a positive-transition-triggered input either of which can be used as an inhibit input. The pin-out is datasneet to DM74LS but, functionally it is not. Order Number Package Number. Not more than one output should be shorted at a time, and the duration should not exceed one second. Additionally an internal latching. Jitter-free operation is maintained over the full temperature and VCC ranges for greater than six decades of timing capacitance 10 pF to 10 mFand greater than one decade of timing resistance 2.

Devices also available in Tape and Reel. Freight and Payment Recommended logistics Recommended bank. This CLR input also serves as a trigger. The output pulses can be terminated by the overriding clear. Please create an account or Sign in. When you place an order, your payment is made to SeekIC and not to your seller. Faithfully describe 24 hours delivery 7 days Changing or Refunding.


A high immunity to VCC noise is also provided by internal latching circuitry. Each device has three inputs permit- ting the choice of either leading-edge or trailing-edge trig- gering.

This provides the input with excellent noise immunity.

If pulse cutoff is not critical, capacitance up to mF and resistance as low as 1. The clear CLR input can terminate the output. Output rise and fall times are independent of pulse length.

Input Current Max Input Voltage. We will also never share your payment details with your seller. Additionally an internal latching circuit at the input stage also provides a high immunity to V CC noise.

74LS Selling Leads, Price trend, 74LS DataSheet download, circuit diagram from

The DM74LS is a dual monostable multivibrator with. This provides the input with. Pulse triggering occurs at a voltage level and is not related to the transition time of the input pulse.